Jindong Li

Jindong Li

Institute of Automation, Chinese Academy of Sciences

👻 About Me

Hello! My name is Jindong Li, and I am a third-year Ph.D. student at the Institute of Automation, Chinese Academy of Sciences. I am currently working under the supervision of Professor Yi Zeng. My research focuses on hardware accelerators for deep learning models. Specifically, I work on:

  • Large Language Models (LLMs)
  • Convolutional Neural Networks (CNNs)
  • Spiking Neural Networks (SNNs)

I am passionate about developing efficient hardware solutions that enhance the performance and scalability of deep learning algorithms. I have published several first-author papers in top conferences and journals, including FPGA, ICCAD, DATE, FPL, TCAD, TVLSI.

Feel free to reach out if you’d like to discuss research topics or collaborate!

📝 Publications

First-Author Publications

  • Li, Jindong, Tenglong Li, Guobin Shen, Dongcheng Zhao, Qian Zhang, and Yi Zeng. “Hummingbird+: Advancing FPGA-based LLM Deployment from Research Prototype to Edge Product” Accepted at FPGA 2026 (Full paper).

  • Li, Jindong, Tenglong Li, Ruiqi Chen, Guobin Shen, Dongcheng Zhao, Qian Zhang, and Yi Zeng. “Hummingbird: A Smaller and Faster Large Language Model Accelerator on Embedded FPGA.” Accepted at ICCAD 2025 🔗[Arxiv]💻[Code]

  • Li, Jindong, Tenglong Li, Guobin Shen, Dongcheng Zhao, Qian Zhang, and Yi Zeng. “Pushing up to the Limit of Memory Bandwidth and Capacity Utilization for Efficient LLM Decoding on Embedded FPGA.” In 2025 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2025. 🔗[IEEE]🔗[Arxiv]💻[Code]

  • Li, Jindong, Tenglong Li, Guobin Shen, Dongcheng Zhao, Qian Zhang, and Yi Zeng. “Revealing Untapped DSP Optimization Potentials for FPGA-Based Systolic Matrix Engines.” In 2024 34th International Conference on Field-Programmable Logic and Applications (FPL), pp. 197-203. IEEE, 2024. 🔗[IEEE] 🔗[Arxiv] 💻[Code]

  • Li, Jindong, Guobin Shen, Dongcheng Zhao, Qian Zhang, and Yi Zeng. “Firefly v2: Advancing hardware support for high-performance spiking neural network with a spatiotemporal fpga accelerator.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2024). 🔗[IEEE] 🔗[Arxiv] 💻[Code]

  • Li, Jindong, Guobin Shen, Dongcheng Zhao, Qian Zhang, and Yi Zeng. “Firefly: A high-throughput hardware accelerator for spiking neural networks with efficient dsp and memory optimization.” IEEE Transactions on Very Large Scale Integration (VLSI) Systems 31, no. 8 (2023): 1178-1191. 🔗[IEEE] 🔗[Arxiv] 💻[Code]

Co-Authored Publications

  • Li, Tenglong, Jindong Li, Guobin Shen, Dongcheng Zhao, Qian Zhang, and Yi Zeng. “FireFly-S: Exploiting Dual-Side Sparsity for Spiking Neural Networks Acceleration With Reconfigurable Spatial Architecture.” IEEE Transactions on Circuits and Systems I: Regular Papers (2024). 🔗[IEEE] 🔗[Arxiv]

  • Shen, Guobin, Jindong Li, Tenglong Li, Dongcheng Zhao, and Yi Zeng. “SpikePack: Enhanced Information Flow in Spiking Neural Networks with High Hardware Compatibility.” Accepted at ICCV 2025. 🔗[Arxiv]

  • Shen, Guobin, Dongcheng Zhao, Tenglong Li, Jindong Li, and Yi Zeng. “Are Conventional SNNs Really Efficient? A Perspective from Network Quantization.” In Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, pp. 27538-27547. 2024. 🔗[IEEE]

  • Wu, Hailong, Jindong Li, and Xiang Chen. “Implementation of CNN Heterogeneous Scheme Based on Domestic FPGA with RISC-V Soft Core CPU.” In 2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), pp. 158-159. IEEE, 2022. 🔗[IEEE]

  • Chen, Xiang, Jindong Li, and Yong Zhao. “Hardware Resource and Computational Density Efficient CNN Accelerator Design Based on FPGA.” In 2021 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), pp. 204-205. IEEE, 2021. 🔗[IEEE] 💻[Code]

Preprints

  • Li, Tenglong, Jindong Li, Guobin Shen, Dongcheng Zhao, Qian Zhang, and Yi Zeng. “FireFly-T: High-Throughput Sparsity Exploitation for Spiking Transformer Acceleration with Dual-Engine Overlay Architecture” arXiv preprint arXiv:2505.12771 (2025). 🔗[Arxiv]

  • Shen, Guobin, Dongcheng Zhao, Yiting Dong, Yang Li, Jindong Li, Kang Sun, and Yi Zeng. “Astrocyte-enabled advancements in spiking neural networks for large language modeling.” arXiv preprint arXiv:2312.07625 (2023). 🔗[Arxiv]

🎓 Educations

💻 Open Source Project

  • Accelerating Llama2-7B on FPGA

  • Accelerating yolov3tiny on embedded FPGA

  • High-throughput spiking neural network accelerators on embedded FPGA

  • MIT 6.175 & MIT 6.375 lab code

  • Implementation of DSP optimization tricks for Xilinx Ultrascale FPGAs

🏅 Honors and Awards

  • 2024.11 National Scholarship (Graduate Student)
  • 2022.06 Outstanding Graduate, Sun Yat-sen University (Bachelor’s Degree)
  • 2021.08 National First Prize, China College IC Competition
  • 2020.10 National Second Prize, Embedded System Design Invitational Contest (Intel Cup)